|
miniOS
x86_64 hobby kernel with SMP, VFS, and POSIX process model
|
#include <miniOS/types.h>

Go to the source code of this file.
Macros | |
| #define | LAPIC_ID 0x020 /* Local APIC ID register */ |
| #define | LAPIC_EOI 0x0B0 /* End-of-Interrupt register */ |
| #define | LAPIC_SVR 0x0F0 /* Spurious Interrupt Vector Register */ |
| #define | LAPIC_ICR_LOW 0x300 /* Interrupt Command Register low */ |
| #define | LAPIC_ICR_HIGH 0x310 /* Interrupt Command Register high */ |
| #define | LAPIC_TIMER_LVT 0x320 /* LVT Timer register */ |
| #define | LAPIC_TIMER_ICR 0x380 /* Timer Initial Count Register */ |
| #define | LAPIC_TIMER_CCR 0x390 /* Timer Current Count Register */ |
| #define | LAPIC_TIMER_DCR 0x3E0 /* Timer Divide Configuration Register*/ |
| #define | LAPIC_SVR_ENABLE (1 << 8) /* Software enable bit */ |
| #define | LAPIC_SPURIOUS_VECTOR 0xFF /* Spurious interrupt vector */ |
| #define | IA32_APIC_BASE_MSR 0x1B |
| #define | IA32_APIC_BASE_ENABLE (1 << 11) /* Global enable bit */ |
| #define | IOAPIC_BASE 0xFEC00000UL |
| #define | IOAPIC_REGSEL 0x00 /* register select */ |
| #define | IOAPIC_IOWIN 0x10 /* data window */ |
| #define | IOAPIC_ID 0x00 |
| #define | IOAPIC_VER 0x01 |
| #define | IOAPIC_REDTBL_LO(n) |
| #define | IOAPIC_REDTBL_HI(n) |
| #define | IOAPIC_RTE_MASKED (1 << 16) /* set to mask (disable) this IRQ line */ |
| #define | IOAPIC_RTE_LEVEL (1 << 15) /* 0=edge, 1=level trigger */ |
| #define | IOAPIC_RTE_LOPOL (1 << 13) /* 0=active-high, 1=active-low polarity */ |
| #define | IRQ_VECTOR_BASE 32 |
| #define | LAPIC_TIMER_PERIODIC (1 << 17) /* LVT timer mode: periodic */ |
| #define | LAPIC_TIMER_ONESHOT (0 << 17) /* LVT timer mode: one-shot */ |
| #define | LAPIC_TIMER_MASKED (1 << 16) /* LVT: mask the timer */ |
| #define | LAPIC_TIMER_VECTOR 48 /* IDT vector for LAPIC timer */ |
| #define | SCHEDULER_KICK_VECTOR 50 /* IDT vector: scheduler-kick IPI from remote CPU */ |
| #define | TLB_SHOOTDOWN_VECTOR 51 /* IDT vector: TLB-shootdown IPI broadcast */ |
| #define | PANIC_HALT_VECTOR 52 /* IDT vector: panic-halt IPI broadcast */ |
| #define | LAPIC_TIMER_DIVBY_16 0x3 /* DCR divide-by-16 */ |
Functions | |
| void | lapic_init (void) |
| Detect, identity-map, and software-enable the local APIC. | |
| static void | lapic_write (uint32_t reg, uint32_t val) |
| Write a 32-bit value to a LAPIC MMIO register. | |
| static uint32_t | lapic_read (uint32_t reg) |
| Read a 32-bit value from a LAPIC MMIO register. | |
| static void | lapic_eoi (void) |
| Signal End-of-Interrupt to the local APIC. | |
| void | lapic_eoi_asm (void) |
| Non-inline wrapper for lapic_eoi(), callable from assembly. | |
| void | lapic_send_ipi (uint8_t target_lapic_id, uint8_t vector) |
| Send a Fixed IPI to a remote CPU. | |
| void | ioapic_init (void) |
| Map and initialise the I/O APIC. | |
| void | ioapic_mask_irq (uint8_t irq) |
| Mask (disable) an I/O APIC redirection entry. | |
| void | ioapic_unmask_irq (uint8_t irq) |
| Unmask (enable) an I/O APIC redirection entry. | |
| void | lapic_timer_idt_install (void) |
| Install the IDT entry for LAPIC_TIMER_VECTOR (48). | |
| void | lapic_timer_init (void) |
| Calibrate and start the BSP LAPIC timer. | |
| void | lapic_timer_init_ap (void) |
| Start the LAPIC timer on the calling AP. | |
Variables | |
| volatile uint32_t * | lapic_base |
| volatile uint64_t | lapic_tick_count |
| uint32_t | lapic_bsp_timer_icr |