miniOS
x86_64 hobby kernel with SMP, VFS, and POSIX process model
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irq.h
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1// MIT License
2//
3// Copyright (c) 2026 Christian Spoo
4//
5// Permission is hereby granted, free of charge, to any person obtaining a copy
6// of this software and associated documentation files (the "Software"), to deal
7// in the Software without restriction, including without limitation the rights
8// to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
9// copies of the Software, and to permit persons to whom the Software is
10// furnished to do so, subject to the following conditions:
11//
12// The above copyright notice and this permission notice shall be included in all
13// copies or substantial portions of the Software.
14//
15// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
18// AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19// LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20// OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21// SOFTWARE.
22
23#ifndef _MINIOS_ARCH_X86_64_IRQ_H_
24#define _MINIOS_ARCH_X86_64_IRQ_H_
25
26#ifndef ASM_SOURCE
27
28#include <miniOS/types.h>
29
43
48
49typedef void idt_handler_func(void *interrupt_stack_frame);
50
51void idt_init();
52void idt_reload(void); /* reload IDTR from global IDT[] — call on each AP after boot */
53void idt_set_handler(uint8_t type, addr_t handler_addr, unsigned int dpl, uint8_t gate_type);
55
56#endif
57
58// ********************************************************
59// Interrupt controller flags
60// ********************************************************
61
62#define PIC1_CMD 0x20 // IO base address for master PIC
63#define PIC2_CMD 0xA0 // IO base address for secondary PIC
64#define PIC1_DATA 0x21 // Master PIC data port
65#define PIC2_DATA 0xA1 // Secondary PIC data port
66#define PIC_EOI 0x20 // End-of-interrupt command code
67
68/* Number of standard IRQ levels on a PC. */
69#define NR_IRQS 16
70
71/* List of standard IRQ levels on a PC. Keep in mind that pin #2 is connected
72 to the slave PIC, and that pin #9 is connected to the master PIC. */
73#define IRQ_TIMER 0
74#define IRQ_KEYBOARD 1
75#define SLAVE_PIC 2
76#define IRQ_COM2 3
77#define IRQ_COM1 4
78#define IRQ_LPT2 5
79#define IRQ_FLOPPY 6
80#define IRQ_LPT1 7
81#define IRQ_RT_CLOCK 8
82#define MASTER_PIC 9
83#define IRQ_AVAILABLE_1 10
84#define IRQ_AVAILABLE_2 11
85#define IRQ_PS2_MOUSE 12
86#define IRQ_COPROCESSOR 13
87#define IRQ_PRIMARY_IDE 14
88#define IRQ_SECONDARY_IDE 15
89
90// ********************************************************
91// CPU exceptions
92// ********************************************************
93
94/* Number of standard exceptions on a PC. */
95#define NR_EXCEPTIONS 32
96
97/* List of standard Intel x86 exceptions.
98 See Intel x86 doc vol 3, section 5.12. */
99#define EXCEPT_DIVIDE_ERROR 0 // No error code
100#define EXCEPT_DEBUG 1 // No error code
101#define EXCEPT_NMI_INTERRUPT 2 // No error code
102#define EXCEPT_BREAKPOINT 3 // No error code
103#define EXCEPT_OVERFLOW 4 // No error code
104#define EXCEPT_BOUND_RANGE_EXCEDEED 5 // No error code
105#define EXCEPT_INVALID_OPCODE 6 // No error code
106#define EXCEPT_DEVICE_NOT_AVAILABLE 7 // No error code
107#define EXCEPT_DOUBLE_FAULT 8 // Yes (Zero)
108#define EXCEPT_COPROCESSOR_SEGMENT_OVERRUN 9 // No error code
109#define EXCEPT_INVALID_TSS 10 // Yes
110#define EXCEPT_SEGMENT_NOT_PRESENT 11 // Yes
111#define EXCEPT_STACK_SEGMENT_FAULT 12 // Yes
112#define EXCEPT_GENERAL_PROTECTION 13 // Yes
113#define EXCEPT_PAGE_FAULT 14 // Yes
114#define EXCEPT_INTEL_RESERVED_1 15 // No
115#define EXCEPT_FLOATING_POINT_ERROR 16 // No
116#define EXCEPT_ALIGNMENT_CHECK 17 // Yes (Zero)
117#define EXCEPT_MACHINE_CHECK 18 // No
118#define EXCEPT_INTEL_RESERVED_2 19 // No
119#define EXCEPT_INTEL_RESERVED_3 20 // No
120#define EXCEPT_INTEL_RESERVED_4 21 // No
121#define EXCEPT_INTEL_RESERVED_5 22 // No
122#define EXCEPT_INTEL_RESERVED_6 23 // No
123#define EXCEPT_INTEL_RESERVED_7 24 // No
124#define EXCEPT_INTEL_RESERVED_8 25 // No
125#define EXCEPT_INTEL_RESERVED_9 26 // No
126#define EXCEPT_INTEL_RESERVED_10 27 // No
127#define EXCEPT_INTEL_RESERVED_11 28 // No
128#define EXCEPT_INTEL_RESERVED_12 29 // No
129#define EXCEPT_INTEL_RESERVED_13 30 // No
130#define EXCEPT_INTEL_RESERVED_14 31 // No
131
132#define IDT_CALL_GATE (0b1100)
133#define IDT_INTERRUPT_GATE (0b1110)
134#define IDT_TRAP_GATE (0b1111)
135
136#endif
uint8_t type
Definition irq.h:4
void idt_set_handler(uint8_t type, addr_t handler_addr, unsigned int dpl, uint8_t gate_type)
Definition idt.c:56
void irq_set_handler(uint8_t irq, idt_handler_func *fn)
Definition ioapic.c:34
uint8_t dpl
Definition irq.h:6
void idt_reload(void)
Definition idt.c:48
void idt_init()
Definition idt.c:37
void idt_handler_func(void *interrupt_stack_frame)
Definition irq.h:49
Definition irq.h:44
uint16_t size
Definition irq.h:45
struct idt_entry_t * offset
Definition irq.h:46
Definition irq.h:30
uint8_t irq_stack_index
Definition irq.h:33
uint32_t zero3
Definition irq.h:41
uint16_t offset_low
Definition irq.h:31
uint8_t dpl
Definition irq.h:37
uint8_t zero1
Definition irq.h:34
uint8_t type
Definition irq.h:35
uint32_t offset_high
Definition irq.h:40
uint8_t present
Definition irq.h:38
uint16_t offset_middle
Definition irq.h:39
uint16_t selector
Definition irq.h:32
uint8_t zero2
Definition irq.h:36
uint64_t addr_t
Definition types.h:39
unsigned short uint16_t
Definition types.h:31
unsigned int uint32_t
Definition types.h:34
unsigned char uint8_t
Definition types.h:28
typedef __attribute__